RV32IMAC Cheat Sheet
Embedded below is the pdf summorizing the entire RISC-V instruction set (RV32IMAC), which is useful during most lessons. The pdf is structured as follows:
p.1- Instructions on how to read the tables.p.2- Registers Table.p.3-5- Encoder Table (to translate assembly into binary machine code manually).p.6-7- Decoder Table (to translate binary machine code into assembly manually)
Below the embedded pdf is a set of exercises to train your ability in encoding and deconding instructions manually.
Encode and Decode Exercises
-
Decode the following instructions:
0x01e007ef0x0001e7b70x004401130x404451130x403100b30xfea64ae30x0003a5830x00b3a023
-
Encode the following instructions:
j -12auipc sp 8andi sp, s0, 4sltiu sp, s0, 4or ra, sp, gp- Solo l'istruzione di branch del seguente programma:
<LABEL>-
lw a1 0(t2) -
add a2 a1 a1 -
sw a1 0(t2) -
bgtz sp <LABEL>
lw a7 8(t2)sw a7 8(t2)
Examples
Encoding instruction 0x01e007ef
First, convert hex into binary:
| hex | 0 | 1 | e | 0 | 0 | 7 | e | f |
|---|---|---|---|---|---|---|---|---|
| bin | 0000 | 0001 | 1110 | 0000 | 0000 | 0111 | 1110 | 1111 |
Then identify the instruction at hand using the tables from the RV32IMAC Cheat Sheet. Instructions are better decoded reading them from right to left, so that the first thing you find are its quadrant and opcode.
| RV32I | 00000001111000000000 | 01111 | 11011 | 11 |
|---|---|---|---|---|
| Meaning | <imm> (encoded) | rd | opcode | quadrant |
| Value | <imm> | 15 | Jump and Link | 4th |
We therefore obtain jal x15 <imm>, where <imm> is the still to be decoded immediate.
All the instruction fields except <imm> are decodable just from the tables, for this instruction. For <imm> we have to further scramble some bits to decode it.
Identify the subfields of the immediate:
<imm> (encoded) | 0 | 0000001111 | 0 | 00000000 |
|---|---|---|---|---|
| Encoding | m2 | imm2 | m1 | imm1 |
Re-order the subfields as written on the tables. Usually the immediate encoding is just below the corresponding instruction's encoding.
Decoding di <imm> | -m2- | imm1 | m1 | imm2 | 0 |
|---|---|---|---|---|---|
<imm> (bin) | 000000000000 | 00000000 | 0 | 0000001111 | 0 |
We obtain the 2's complement
<imm> (bin)=00000000000000000000000000011110
that is the decimal
<imm> (dec)=30
The complete disassembled instruction is therefore jal x15 30, o jal a5 30 using the ABI register aliases.
Deconding instruction j -12
Find the instruction j on the encoding part of the RV32IMAC Cheat Sheet.
Instruction Encoding j | <imm> (encoded) | 00000 | 11011 | 11 |
|---|
We therefore know the least significant bits xxxxxxxxxxxxxxxxxxxx000001101111. The rest is just an immediate, <imm> = 30 , which we now have to encode.
First convert <imm> = -12 to 2's complement <imm> (bin) = 10100, and now sign-extend it to cover all the 32 bits of its width <imm> (bin) = 11111111111111111111111111110100.
Divide this number into its subfields as of RV32IMAC Cheat Sheet, Encoder section.
<imm> (bin) | 111111111111 | 11111111 | 1 | 1111111010 | 0 |
|---|---|---|---|---|---|
Decoding <imm> | -m2- | imm1 | m1 | imm2 | 0 |
Re-order the fields to encode the immediate:
| Encoding | m2 | imm2 | m1 | imm1 |
|---|---|---|---|---|
<imm> (encoded) | 1 | 1111111010 | 1 | 11111111 |
We obtain <imm> (encoded) = 11111111010111111111xxxxxxxxxxxx, that are the missing most significant bits.
The complete assembled instruction is therefore 11111111010111111111000001101111, after having jointed the two half-results above.