1.
Introduction
2.
Circuit Timing
2.1.
Gates and Chips Operate with a Propagation Delay
2.2.
Propagation Delay Poses an Upper Limit to the Speed of RTL Circuits
2.3.
Keeping Track of the Dynamic Behaviour of RTL Circuits with Diagrams
2.4.
Introduction to the Pipelined Processor
3.
Building the Pipelined Processor
3.1.
Grouping the Components of the Single-Cycle Processor into Stages
3.2.
An Overview of how Each Inctruction Activates Each Stage
4.
Executing Programs on the Pipelined Proessor
4.1.
DEMO - Meaningless Program
4.2.
DEMO - Program Towards Hazards
5.
Assignments
6.
Appendix
6.1.
RV32IMAC Cheat Sheet
6.2.
Single Cycle Processor Components
6.2.1.
Single Register
6.2.2.
ROM
6.2.3.
Register File
6.2.4.
PC
6.2.5.
ALU
6.3.
Simulation Tools
6.3.1.
S.H.E.A.S. Tutorial
6.3.2.
Ripes Tutorial
Light
Rust
Coal
Navy
Ayu (default)
Introduction to Pipelining
Appendix
This part of the lesson contains complementary material to the rest of the lesson.
Index
RV32IMAC Cheat Sheet
Single Cycle Processor Components
Single Register
ROM
Register File
PC
ALU
Simulation Tools
S.H.E.A.S. Tutorial
Ripes Tutorial